The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs. Each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs.
In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
However, as the feature sizes continue to decrease, the manufacturing cost of fabrication processes continues to increase. The fabrication processes are etching processes, photolithography processes, alignment processes, gap-filling processes, or the like. Therefore, it is a challenge to form semiconductor device structures with smaller and smaller sizes using cost-effective fabrication processes.